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In order to dissipate heat generated by the internal VTT LDO, the ground pad, pin 29, should be connected to the internal ground plane through at least four vias.

The worst case response time can be either at the application or removal of load. The counts that are required to reset the Fault Reset Counter represent 8 soft-start cycles, as one soft-start cycle is clock cycles. The initiation of soft start may affect other regulators.

Minimize the length of the connections between the input capacitors, CIN, and the power switches by placing them nearby. Under and Over-voltage Monitoring on All Outputs? Do not insert any circuitry between this pin and the gate of the upper MOSFET, as it may interfere with the internal adaptive shoot-through protection circuitry and render it ineffective.

Af9173 maximum rDS ON at the highest junction temperature.

EG Datasheet, PDF – Qdatasheet

N is the number of terminals. Shoot-Through Protection A datashete condition occurs when both the upper and lower MOSFETs are turned on simultaneously, effectively shorting the input voltage to ground. Special sequencing of the input supplies is not necessary.


Consult with the manufacturer of the load on specific decoupling daasheet. The FB pin is also monitored for under and over-voltage events. This allows the termination voltage to float during the S3 sleep state. The important parameters for the bulk input capacitance are the voltage rating and the RMS current rating. Angles are in degrees.

AME (ANALOG MICROELECTRONICS) Electronic Components Datasheet –

However, the Equivalent Series Inductance ESL of these capacitors increases with case size and can reduce the usefulness of the capacitor to high slew-rate transient loading.

The voltage at this pin is regulated to 0.

The lower switch realizes most of the switching losses when the converter is sinking current see the equations below. Use the remaining printed circuit layers for small signal wiring.

AT9173 Datasheet PDF

At time t10, the 3 soft-start cycle reset is ended and the individual regulators are enabled and soft-started in the same sequence as the mechanical cold start sequence, with the exception that the VDDQ regulator is already enabled and in regulation. Graphics cards – GPU and memory supplies? Do not insert any circuitry between this pin and the gate of the lower MOSFET, as it may interfere with the internal adaptive shoot-through protection circuitry and render it ineffective.


The configuration of the pin 1 identifier is optional, but must be datashheet within the zone indicated. Minimizing the response time can minimize the output capacitance required. ACPI compliant sleep state control?

This method allows the VDDQ regulator to both source and sink current. In high-current applications, the MOSFET power dissipation, package selection and heatsink are the dominant design factors.

The actual Modulator Gain has a high gain zt9173 due to the high Q factor of dataseet output filter and is not shown in Figure 6. Connect this pin to the VTT output at the physical point of desired regulation. Include worst case component variations when determining phase margin.

Dedicate one solid layer, usually a middle layer of the PC board, for a ground plane and make all critical component ground connections with vias to this layer. Careful component selection, tight layout of the critical components, and short, wide traces minimizes the magnitude of voltage spikes.

(PDF) AT9173 Datasheet download

This allows the VTT rail to float. A multi-layer printed circuit board is recommended. Doing so may interfere with the shootthrough protection.